Semiconductor testing is a crucial process in the production of chips (semiconductors), it is important to ensure the function and yield of the production. Chip testing can be divided into two main parts.
WT(wafer test) and FT(final package test). Some chips also perform SLT (system level test). There are also specific requirements for chips that require some reliability testing.
Wafer Test( Chip Probing Test)
The wafer test is also called the CP (Chip Probing) test, which tests the wafer before the chip is unpackaged so that the problematic chip can be removed before packaging, it saves the cost of packaging and FT. Wafer testing sits between wafer fabrication and packaging throughout the chip-making process. After the Wafer is made, thousands of naked dies (unpackaged chips) are regularly filled with the entire Wafer. Since the chip has not been sliced, the pins of the chip are all exposed, and these extremely small pins need to be connected to the Tester by a thinner probe (Prober). The following is the schematic diagram of WT automated test system.
You can think of CP as the following test, using the Probe to test the wafer
However, in applications, the number of probes is large, and thousands of probes will be used to make probe stations. The Probe platform is used to carry the wafer, so that each die and bond pads in the wafer can be connected to the Probe card and can be accurately shifted at the same time. After each test, another die can be connected to the Probe card again. This ensures that every die on the wafer is tested.
Wafer test mainly includes the following aspects:
Scan checks whether the logical function of the chip is correct.
Boundary SCAN is used to detect whether the chip pin function is correct.
Chips are often integrated with various types of memory (such as ROM/RAM/Flash). In order to test the memory read and write and storage functions, BIST (Built-In SelfTest) logic is usually added in advance during the design for memory self-test. The chip enters various BIST functions through special pin configuration, and the BIST module feedbacks the test results to the Tester after the completion of self-testing;
DC test includes Open/Short test of the chip Signal PIN, PowerShort test of the power PIN, and test whether the DC current and voltage parameters of the chip meet the design specifications;
For wireless communication chips, the function and performance of RF is important. RF test is used in wafer test to detect whether the logic function of RF module is correct, and RF further performance test is carried out in FT.
Other function tests of the chip are used to test whether other important functions and performance of the chip meet the design specifications.
The closer a wafer is to the edge, the error rate of a die ( an unpackaged chip) is higher.
Final Test (Final Package Test)
The FT(final test) test is the final test, which is performed after the chip is packaged. FT test belongs to chip level test, which establishes an electrical connection between automated test equipment (ATE) and packaged chip through test board (Loadboard) and test Socket (Socket). The purpose of FT testing is to screen out products that meet the design specifications. The test system structure of FT is as follows:
FT Test requires hardware equipment including test board, test socket, ATE (Automation Test Equi[pment]) test machine, and Handler, where Handler is also known as an automated classifier, is used to realize FT test automation equipment.
The handler can be tested only when it is combined with the tester and connected to the interface. The action is that the handler's arm puts the chip into the socket, and then the contact pusher presses down. Make the pin of the chip properly contact with the socket and send the start signal to the tester through the interface. After the test is completed, the tester sends back the binning and EOT(end of test) signals. The handler then performs the classification action.
The FT test items are also determined based on the functions and characteristics of the chip. Common FT tests are:
most of the test need the sockets to carry the probes pin to pass the signal to inspect
DC test is to check the device DC current and voltage parameters;
Eflash test is to check the embedded flash function and performance, including reading and writing parameters, action, power consumption and speed and other parameters;
Function test is to test the logic function of the chip.
AC test is to verify the AC specifications, including the quality of the AC output signal and the actual parameters of the signal;
RF test is aimed at the chip with RF module, mainly to verify the function and performance parameters of the RF module;
There is also DFT test, DFT (Design forTest) test mainly includes scan scan design and internal component self-test, that is, BIST(Build In Self Test).
